Method for making semiconductor device and semiconductor device made thereby

ABSTRACT

Disclosed is a method for yield enhancement of making a semiconductor device. The method for yield enhancement of making a semiconductor device comprises the steps of: providing the semiconductor device comprising an epitaxial layer including a defect; forming a dielectric layer on the epitaxial layer; detecting and identifying a location of the defect; and etching the dielectric layer and leaving a part of the dielectric layer to cover an area substantially corresponding to the detected defect. The semiconductor device made by the method is also disclosed.

REFERENCE TO RELATED APPLICATION

This application is a continuation-in-part of U.S. patent application Ser. No. 13/741,938, entitled “Method and Apparatus for Making a Semiconductor Device”, filed on Jan. 15, 2013, now pending, the entire content of which is incorporated herein by reference.

TECHNICAL FIELD

The application relates to a method for making a semiconductor device, and more particular to a method for yield enhancement of making a semiconductor device by detecting a defect included in an epitaxial layer of the semiconductor device and forming a photo-resistor comprising a region substantially corresponding to the detected defect. The semiconductor device made by the method is also disclosed.

DESCRIPTION OF BACKGROUND ART

Because the petroleum source is limited, various kinds of substitutive energy are developed extensively and turned into products. Among those, the solar cell has become the commercial products for either the industrial or the residential use, and the III-V group material solar cell is mainly applied to the space industry and the industrial field because of its high conversion efficiency.

However, there are many kinds of defects existing in/on the epitaxial layer of III-V group material. For example, as shown in FIG. 1, a pinhole defect 101 which is usually caused by a dislocation under stress occurs during the epitaxial growth of the III-V group material, and cracks 102 along the lattices also happen, especially in the wafer bonding process or the substrate transferring process. There are other kinds of defects, such as particles on the epitaxial layer or hilllocks which are particles covered by the epitaxial layer and exists in the epitaxial layer. These defects in/on the epitaxial layer result in device problems such as current leakage, and make the photovoltaic device operate abnormally. As the demand for a larger size photovoltaic device increases, the yield loss due to the defect becomes higher. For example, a 4-inch wafer produces only two photovoltaic devices used in aerospace industry, and the defect in/on the epitaxial layer results in 50% yield loss accordingly. In some prior art, a laser is used to burn and remove, the defects. However, it is difficult to remove the residual material produced in the laser treatment, and the residual material may also lead to a current leakage.

SUMMARY OF THE DISCLOSURE

Disclosed is a method for yield enhancement of making a semiconductor device. The method for yield enhancement of making a semiconductor device comprises the steps of: providing the semiconductor device comprising an epitaxial layer including a defect; forming a dielectric layer on the epitaxial layer; detecting and identifying a location of the defect; and etching the dielectric layer and leaving a part of the dielectric layer to cover an area substantially corresponding to the detected defect. The semiconductor device made by the method is also disclosed.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates defects existing in/on the epitaxial layer of III-V group material of a photovoltaic device known in the prior art.

FIG. 2A illustrates the function block diagram of the apparatus in accordance with one embodiment of the present application.

FIG. 2B illustrates the details of a part of the apparatus in FIG. 2A.

FIGS. 3A to 3L illustrate a method in accordance with one embodiment of the present application.

FIG. 4 illustrates the process of the exposing step related to the method in FIGS. 3A to 3L.

FIGS. 5A to 5E illustrate a method in accordance with the second embodiment of the present application.

FIGS. 6A to 6D illustrate a method in accordance with the third embodiment of the present application.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

FIG. 2A and FIG. 2B illustrate an apparatus in accordance with one embodiment of the present application. FIG. 2A shows the function block diagram of the apparatus, and FIG. 2B illustrates the details of a part of the apparatus. Please refer to FIG. 2A. The apparatus 200 is used for detecting a defect included in an epitaxial layer on a substrate of a wafer and forming a photo-resistor comprising a region substantially corresponding to the detected defect. The apparatus 200 comprises a coating module 210, an exposing module 220, a developing module 230, and an image recognition system 240. The apparatus 200 may further comprise a mask-used exposing module 250 to transfer a pattern on a mask, such as cutting lines, to the photo-resistor for use in other process. It is noted that the mask-used exposing “module” can also be in the form of an “apparatus” which is associated with the apparatus 200. Here a “module” means a part of an “apparatus” and provides a specific function in the apparatus when assembled to the apparatus. A module cannot function independently. In contrast, an apparatus can function independently and can be optionally associated with another apparatus to perform its function. And “associated with” means the electrical signals are exchanged, and sometimes may also mean mechanical connection if necessary.

The coating module 210 is used to coat a photo-resistor on the epitaxial layer. The exposing module 220 comprising a first light source (not shown) is used to expose a part of the photo-resistor. The image recognition system 240 is used to detect the defect and comprises a second light source 241, an image sensor 242, and a comparison unit 243. It is noted that the image recognition system 240 can be set inside the exposing module 220 or a different module separated from the exposing module 220. In another embodiment, only some elements of the image recognition system 240 such as the second light source 241 and the image sensor 242 are inside the exposing module 220, and the electrical signals can be exchanged between the image recognition system 240 and the exposing module 220. In the case that the whole image recognition system 240 is set inside the exposing module 220 or in the case that some elements of the image recognition system 240 are set inside the exposing module 220, the defect detecting and the exposing step can be performed substantially at the same time. That is, the defect is detected by the image recognition system 240 and the part of the photo-resistor substantially corresponding to the defect detected is exposed by the exposing module 220 immediately. When the image recognition system 240 is not in a module separated from the exposing module 220, the time interval between the finish of defect detecting and the actuation of the exposing step is very short because there is not time spent on wafer transferring between two separated modules. If the image recognition system 240 is set inside a module separated from the exposing module 220, the wafer may be first loaded into the module where the image recognition system 240 is set inside to detect the defect, and then the information of the location of the defect detected is sent to the exposing module 220 to which the wafer is then transferred, and the part of the photo-resistor substantially corresponding to the defect detected is exposed accordingly.

As mentioned above, the apparatus 200 may further comprise a mask-used exposing module 250 or be associated with a mask-used exposing apparatus 250 to transfer a pattern on a mask to the photo-resistor. A part of the photo-resistor corresponding to the pattern in the mask may be optionally exposed by the mask-used exposing module (or apparatus) 250 before the detecting step or after the exposing step. The part of the photo-resistor corresponding to the pattern in the mask together with the exposed part of the photo-resistor substantially corresponding to the defect detected may be removed later in a developing step. The developing module 230 is used to develop the exposed photo-resistor so the part of the photo-resistor exposed by the first light source in the exposing module 220 and the part exposed by the mask-used exposing module (or apparatus) 250 are removed after the developing.

Please refer to FIG. 2B. The left part of the figure illustrates the details of the image recognition system 240 and some parts of the exposing module 220. The right part of the figure illustrates the mask-used exposing module (or apparatus) 250. The image recognition system 240 comprises elements enclosed by the broken line, i.e. the second light source 241, the image sensor 242, and the comparison unit 243, and the exposing module 220 comprises a first light source 221 and a platform 222. As mentioned above, the figure shows the case which the whole image recognition system 240 is set inside the exposing module 220 and the electrical signals of the image recognition system 240 and the exposing module 220 are exchanged so that the detecting of the defect and the exposing step are performed substantially at the same time. A wafer 201 is loaded into the exposing module 220 and disposed on a platform 222 of the exposing module 220. The platform 222 carries the wafer 201 and moves under the first light source 221 of the exposing module 220 and the second light source 241 and the image sensor 242 of the image recognition system 240. The second light source 241 provides illumination for image recognition and is different from the first light source 221 used for exposing. For example, when the photo-resistor is a positive type photo-resistor, the first light source is UV light which causes the positive type photo-resistor to have a chemical reaction, and the second light source is non-UV light which provides illumination for image recognition and does not cause the positive type photo-resistor to have a chemical reaction. The image sensor 242 is used to capture an image of a pattern on the epitaxial layer on the wafer 201. The image sensor 242 comprises, for example, a CCD (Charge-coupled Device) or a CMOS image sensor. The comparison unit 243 is used to compare the image of the pattern captured by the image sensor 242 with a pre-determined pattern stored in the comparison unit 243 for determining whether the pattern is a defect or not. The whole image recognition system 240 is set inside the exposing module 220 and the electrical signals of the image recognition system 240 and associated with the exposing module 220 are exchanged so that the detecting of the defect and the exposing step are performed substantially at the same time. That is, the wafer 201 is moved to be scanned by the image sensor 242, and when a defect is determined by the comparison unit 243, a signal from the comparison unit 243 is transferred to the exposing module 220 so that the first light source 221 is actuated to expose the part of the photo-resistor substantially corresponding to the defect detected.

In addition, as mentioned in FIG. 2A, the wafer 201 may be optionally transferred to the mask-used exposing module (or apparatus) 250 before the detecting step or after the exposing step. It is noted that when the wafer 201 is transferred to the mask-used exposing module (or apparatus) 250 before the detecting step, the wafer 201 is transferred directly from the coating module 210 after the aforementioned coating step.

The mask-used exposing module (or apparatus) 250 comprises a mask table 253 on which a mask 202 is disposed, a platform 252 on which the wafer 201 is disposed on, and a light source 251. A part of the photo-resistor corresponding to a pattern in the mask 202 may be optionally exposed by the mask-used exposing module (or apparatus) 250 with the light source 251 before the detecting step or after the exposing step. The light source 251 may be the same as the first light source 221, UV light. The pattern in the mask 202 comprises, for example, cutting lines around a solar cell chip.

FIGS. 3A to 3L illustrate a method in accordance with one embodiment of the present application. The method is used for removing a defect from an epitaxial layer on a substrate of a wafer and can be further used for forming a photovoltaic device. The method may be carried out with the utilization of the apparatus as previously illustrated in FIGS. 2A and 2B.

As shown in FIG. 3A, the method comprises providing a wafer comprising a substrate 301 on which an epitaxial stack 302 is formed first. The epitaxial stack 302 comprises a plurality of layers of III-V group material to form at least one p-n junction of a solar cell. The epitaxial stack 302 comprises a defect 302 d. The defect 302 d may be any one of those illustrated in FIG. 1. In FIG. 3B, a photo-resistor 300 r is coated on the epitaxial stack 302 by the aforementioned coating module 210. The wafer is then transferred to the aforementioned mask-used exposing module (or apparatus) 250 directly from the coating module 210 after the coating step. As mentioned above, this embodiment illustrates a case which a mask-used exposing is performed before a defect detecting step. The defect detecting step will be illustrated later in FIG. 3C. In the embodiment, a mask 300M is used, and the pattern in the mask 300M, which is a pattern for cutting lines 300MC around a solar cell chip, is transferred to the photo-resistor 300 r with an exposing by light (as the arrows shows) from the light source 251 of the mask-used exposing module (or apparatus) 250 shown in FIG. 2B. The exposed pattern 300 rc in the photo-resistor 300 r is used for forming the cutting lines in the wafer as will be illustrated later in FIG. 3E.

As shown in FIG. 3C, this embodiment illustrates a case which the detecting of the defect and an exposing step are performed substantially at the same time by using the apparatus shown in FIG. 2B, and the wafer is transferred to the aforementioned exposing module 220 and a defect detecting step is performed. The wafer is scanned by the aforementioned image sensor 242 with the illumination provided by light from the second light source 241. And once a defect, for example, the defect 302 d is detected, the first light source 221 is actuated to expose the part of the photo-resistor 300 rd which is substantially corresponding to the defect detected. The first light source 221 used for exposing is different from the second light source 241 for image recognition. For example, the photo-resistor 300 r in this embodiment is a positive type photo-resistor, and the first light source 221 is UV light which causes the positive type photo-resistor 300 r to have a chemical reaction, and the second light source 241 is non-UV light which provides illumination for image recognition and does not cause the positive type photo-resistor to have a chemical reaction. The process of the exposing step is illustrated in FIG. 4. In FIG. 4, the light from the first light source 221 is projected onto the defect and forms a spot as denoted as a circle. The wafer is moved as the aforementioned platform 222 carrying the wafer moves, and spots are formed upon the wafer. In this example, as mentioned previously in FIG. 1, two kinds of defects, i.e., a pinhole defect 101 and cracks 102 are shown, and the area of these defects forms a defect area. The spots as denoted are formed substantially along the contour of the defect area and cover the whole defect area. Finally, the collection of these circles forms the exposed part as denoted by the solid line in the figure to cover the defect area. The area of the exposed part is substantial the same as or a little larger than the defect area. It is noted that the information of the location of the defect detected may be stored in the same apparatus or sent to another apparatus for a later use.

And then as shown in FIG. 3D, the wafer is transferred to the aforementioned developing module 230, and the photo-resistor 300 r is developed to remove the exposed part of the photo-resistor 300 r so that a subsequent etch process is performed with the developed photo-resistor 300 r as a mask to remove the part of the epitaxial layer where the photo-resistor is removed. The result after the etch process is shown in FIG. 3E where an empty part 302 d′ substantially corresponding to the defect 302 d detected and an empty part 302 c corresponding to a cutting line are formed in the epitaxial stack. The etch process may be a dry etch or a wet etch, and the photo-resistor 300 r is removed after the etch process. Then as shown in FIGS. 3F to 3J, a dielectric material is formed substantially in the region where the epitaxial stack 302 is removed; in other words, a dielectric material is formed in the empty part 302 d′ and the empty part 302 c shown in FIG. 3E. As shown in FIG. 3F, a dielectric layer 303 is formed. The dielectric layer 303 may be, for example, alumina, titanium dioxide, silicon nitride (Silsk) or silicon oxide (SiO_(x)). In FIG. 30, a negative photo-resistor 300R is coated on the dielectric layer 303, and an exposing is performed on the photo-resistor 300R with a mask 300M2. The area of the pattern 300M2C may be a little larger than the area of the pattern 300MC in FIG. 3B. The exposing can be performed by the mask-used exposing module (or apparatus) 250. Since the photo-resistor 300R is a negative type, as will be illustrated in FIG. 3I, the exposed part is left as a remaining part after developing. And then in FIG. 3H, the information of the location of the defect detected stored as previously mentioned in FIG. 3C is used so that an exposing step may be carried out accordingly. The area of the exposed part can be substantial the same as or a little larger than the area of the empty part 302 d′ shown in FIG. 3E. As a result, as shown in FIG. 3I, after a developing step, a first remaining part 300RD substantially corresponding to the area of the defect 302 d detected and a second remaining part 300RC corresponding to cutting lines of the negative photo-resistor 300R are formed on the dielectric layer 303. And then in FIG. 3J, an etch process is performed to remove the part of the dielectric layer 303 uncovered by the first remaining part 300RD and the second remaining part 300RC of the photo-resistor 300R, and dielectric material 303D and 303C is formed substantially in the region where the epitaxial layer is removed. The etch process may be a dry etch or a wet etch, and first and second remaining parts 300RD and 300RC of the photo-resistor are removed after the etch process. The dielectric material 303D is formed in the region corresponding to the empty part 302 d′ in FIG. 3E which is removed for the defect 302 d, and the dielectric material 303C is formed in the region corresponding to empty part 302 c in FIG. 3E which is removed for the cutting lines 303 c. The dielectric material 303D provides an electrical isolation to the sidewalls of the empty part 302 d′, and therefore avoids forming a current leakage path or the failure of the p-n junction in the epitaxial stack 302. In addition, when an electrode passes or is located on the empty part 302 d′, the dielectric material 303D provides an electrical isolation between the electrode and the junction to avoids a shortage.

As shown in FIG. 3K, an anti-reflective layer 304, the first electrode 305, and the second electrode 306 are subsequently formed. The main portion of the anti-reflective layer 304 is formed on the epitaxial stack 302 while a portion of the anti-reflective layer 304 is formed on the dielectric material 303D to fill the concave part caused by the empty part 302 d′ in FIG. 3E with the dielectric material 303D formed thereon. The first electrode 305 is formed in the anti-reflective layer 304 and on the epitaxial stack 302. The second electrode 306 is formed on the surface of substrate 301 opposite to the surface on which the epitaxial stack 302 is disposed. And in FIG. 3L, as mentioned above, the cutting lines are formed around a solar ell chip, and the substrate 301 is cut along the cutting lines as indicated by the line LL′ to form the solar cell chips. It is noted that the process flow shown in this embodiment may be adjusted by the person of the skill in the art. For example, though the cutting line pattern, i.e. the mask-used exposing, is performed before the detecting step in this embodiment, it is apparent that the mask-used exposing may be performed after the detecting step. Besides, the coating step may be performed after the detecting step. For example, the wafer may be first loaded to an separated module where the image recognition system 240 is set inside (or the exposing module 220 comprising an image recognition system set inside it) to have the detecting step performed, and then the wafer is transferred to the coating module 210 to have the coating step performed. And finally the stored information of the location of the detected defect is used in the exposing module 220 to have the exposing step performed accordingly after the coating step. Similarly, the order for the wafer to be transferred between different modules in the apparatus may be designed by the person of the skill in the art accordingly as the above illustration. In addition, though the four modules are integrated in one apparatus as shown in FIG. 2A, one or more modules may be separated and formed as an independent apparatus by the person of the skill in the art. It is also noted that application of the apparatus and the method illustrated in the present application is not limited to a photovoltaic device, and can be commonly used for a semiconductor device, such as an LED. The yield of the semiconductor device is enhanced by detecting and removing the defect included in an epitaxial layer of the semiconductor device and forming a dielectric material in the region where the epitaxial layer is removed to provide an electrical isolation and avoid problems such as current leakage.

FIGS. 5A to 5E illustrate the method in accordance with the second embodiment of the present application, which is also a method for yield enhancement of making a semiconductor device by detecting a defect. The defect may be any one of those illustrated in FIG. 1. Compared with the method illustrated in FIGS. 3A to 3L which removes the defect, a dielectric layer is used to cover the detected defect instead of removing the defect in the present embodiment. Like the embodiment illustrated in FIGS. 3A to 3L, the method can also be used for forming a photovoltaic device and be carried out with the utilization of the apparatus as previously illustrated in FIGS. 2A and 2B.

As shown in FIG. 5A, the method comprises the steps of providing a wafer comprising a substrate 501 on which an epitaxial stack 502 is formed. A defect 502 d is included in the epitaxial stack 502. The epitaxial stack 502 comprises a plurality of layers of III-V group material to form at least one p-n junction of a solar cell. In FIG. 5B, a dielectric layer 503 is formed on the epitaxial stack 502. For example, the dielectric layer 503 may comprise silicon oxide or silicon nitride. And then, as shown in FIG. 5C, the defect 502 d is detected and the location of the defect 502 d is identified so that a photo-resistor 500RD (a part of the photo-resistor 500R) is formed on the dielectric layer 503. As mentioned above, the apparatus as previously illustrated in FIGS. 2A and 2B (or more specifically, the image recognition system 240) may be used to detect and identify the location of the defect 502 d. Similarly, the coating module 210 may be used to coat the photo-resistor 500R on the dielectric layer 503, and the exposing module 220 may be used to expose a part of the photo-resistor 500R. And as previous illustrated, the exposure can be performed according to an information of the location of the defect 502 d provided by the image recognition system 240. After development by the developing module 230, the photo-resistor 500RD, which is a part of the photo-resistor 500R, is left on the dielectric layer 503 in an area substantially corresponding to the defect 502 d. The processes may be similar to those illustrated in FIG. 3I. That is, the photo-resistor 500R may be a negative type, and the photo-resistor 500RD is exposed and left as a remaining part after developing. The area of the photo-resistor 500RD can be substantial the same as or a little larger than the area of the defect 502 d. In addition, when the photo-resistor 500RD is exposed, it may be exposed by a first light source different from a second light source used in the image recognition system 240 for detecting and identifying the location of the defect. In an alternative embodiment, the photo-resistor 500RD may be formed on the dielectric layer 503 manually. It can be that an operator manually dispenses the photo-resistor 500RD on the dielectric layer 503 only in the area substantially corresponding to the defect 502 d according to an information of the location of the defect 502 d provided by the image recognition system 240 after the detection.

As shown in FIG. 5D, after the photo-resistor 500RD is formed on the dielectric layer 503, an etch process is performed to remove the part of the dielectric layer 503 which is uncovered by the photo-resistor 500RD. A part of the dielectric layer 503, i.e. 503D, is left to cover the area substantially corresponding to the detected defect 502 d. The photo-resistor 500RD is removed after the etch process. The dielectric material 503D provides an electrical isolation to the layers subsequently formed thereon, especially to an electrode, and therefore avoids forming a current leakage path or the failure due to shortage caused by the defect 502 d. Accordingly, the yield is enhanced. As shown in the figure, an anti-reflective layer 504 is subsequently formed.

As shown in FIG. 5E, a first electrode 505 is subsequently formed in the anti-reflective layer 504 and on the epitaxial stack 502. The present embodiment illustrates that the first electrode 505 passes over the defect 502 d. Because part of the dielectric layer 503D covers the area substantially corresponding to the defect 502 d, the first electrode 505 does not contact the defect 502 d directly. That is, the dielectric layer 503D is disposed between the first electrode 505 and the defect 502 d, and forms an electrical isolation to the first electrode 505. Therefore, though the defect 502 d is not removed as the method illustrated in FIGS. 3A to 3L, the yield is still improved.

FIGS. 6A to 6D illustrate a method in accordance with the third embodiment of the present application. This embodiment is a modification of the embodiment shown in FIGS. 5A to 5E. Compared with the method illustrated in FIGS. 5A to 5E which has the dielectric layer 503D, an anti-reflective layer is used instead of the dielectric layer 503D to cover the defect and provide an electrical isolation in the present embodiment. Like the embodiment illustrated in FIGS. 5A to 5E, the method can also be used for forming a photovoltaic device and be carried out with the utilization of the apparatus as previously illustrated in FIGS. 2A and 2B. And for some elements which are the same as the elements in FIGS. 5A to 5E, the first digit of the label code for such element is changed from “5” to “6” in FIGS. 6A to 6D. For example, the element 602 which corresponds to the epitaxial stack 502 in FIGS. 5A to 5E is also an epitaxial stack 602 in FIGS. 6A to 6D.

It is noted that in FIGS. 6A to 6D, the figures labeled with “(a)” show the top views of the photovoltaic device to be illustrated, the figures labeled with “(b)” show the cross-sectional views along the line A-A′ in the top views, and the figures labeled with “(c)” (in FIGS. 6C and 6D) show the cross-sectional views along the line B-B′. As shown in FIG. 6A, the method comprises the steps of providing a wafer comprising a substrate 601 (see figure (b)) on which an epitaxial stack 602 is formed. A defect 602 d is included in the epitaxial stack 602. The epitaxial stack 602 comprises a plurality of layers of III-V group material to form at least one p-n junction of a solar cell. It is noted that the present embodiment also illustrates that a first electrode 605 (to be illustrated later in FIG. 6D) passes over the defect 602 d. The area 605P between the two dash lines is the position where the first electrode 605 is disposed. In FIG. 6B, an anti-reflective layer 604 is formed on the epitaxial stack 602 (see figure (b)). For example, the anti-reflective layer 604 may comprise aluminum oxide (Al₂O₃) or titanium dioxide (TiO₂). As mentioned above, the anti-refletive layer 604 is used instead of the dielectric layer 503D in the previous embodiment to cover the defect 602 d and provide an electrical isolation. And then, as shown in FIG. 6C, the defect 602 d is detected and the location of the defect 602 d is identified, so that a photo-resistor 600RD (see figure (b), the photo-resistor 600RD is a part of the photo-resistor 600R) is formed on the anti-reflective layer 604. As mentioned above, the apparatus as previously illustrated in FIGS. 2A and 2B (or more specifically, the image recognition system 240) may be used to detect and identify the location of the defect 602 d. Similarly, the coating module 210 may be used to coat the photo-resistor 600R on the anti-reflective layer 604, and the exposing module 220 may be used to expose a part of the photo-resistor 600R. And as previous illustrated, the exposure can be performed according to an information of the location of the defect 602 d provided by the image recognition system 240. After development by the developing module 230, the photo-resistor 600RD, which is a part of the photo-resistor 600R, is left on the anti-reflective layer 604 in an area substantially corresponding to the defect 602 d (see figure (a), the photo-resistor 600RD is denoted by the circle which covers the defect 602 d). The processes may be similar to those illustrated in FIG. 3I. That is, the photo-resistor 600R may be a negative type, and the photo-resistor 600RD is exposed and left as a remaining part after developing. The area of the photo-resistor 600RD can be substantial the same as or a little larger than the area of the defect 602 d. In addition, when the photo-resistor 600RD is exposed, it may be exposed by a first light source different from a second light source used in the image recognition system 240 for detecting and identifying the location of the defect. As mentioned above, because the present embodiment illustrates that the first electrode 605 (to be illustrated later in FIG. 6D) passes over the defect 502 d, a mask is provided to the apparatus illustrated in FIGS. 2A and 2B to expose the pattern for an electrode, i.e. the area 605P. The photo-resistor 600R in the area 605P (between the two dash lines) where the first electrode 605 is disposed is removed (except that the photo-resistor 600RD denoted by the circle is left) after development. The cross-sectional view along the line B-B′ shown in figure (c) indicates that the photo-resistor 600R in the area 605P (between the two dash lines) is removed to expose the anti-reflective layer 604. In an alternative embodiment, the photo-resistor 600RD (denoted by the circle in figure (a)) may be formed on the anti-reflective layer 604 manually. For example, after the electrode pattern (i.e. the area 605P) is developed as described above, an operator can manually dispense the photo-resistor 600RD on the anti-reflective layer 604 in the area substantially corresponding to the defect 602 d according to an information of the location of the defect 602 d provided by the image recognition system 240.

And then, in FIG. 6D, after the photo-resistor 600R (including the photo-resistor 600RD) is formed on the anti-reflective layer 604, an etch process is performed to remove the part of the anti-reflective layer 604 which is uncovered by the photo-resistor 600R. A part of the anti-reflective layer 604 (denoted by the circle in figure (a)) is left to cover the area substantially corresponding to the detected defect 602 d. The photo-resistor 600R (including the photo-resistor 600RD) is removed after the etch process. The anti-reflective layer 604 on the defect 602 d provides an electrical isolation to the layers subsequently formed thereon, especially to the first electrode 605, and therefore avoids forming a current leakage path or the failure due to shortage caused by the defect 602 d. Accordingly, the yield is enhanced. As shown in the figure, the first electrode 605 is subsequently formed. The first electrode 605 comprises a first part 605 a (denoted by the circle in figure (a)) and a second part 605 b, wherein the first part 605 a overlaps the area substantially corresponding to the defect 602 d, and the second part 605 b does not overlap the area. It is shown in the figure (h) that the first part 605 a of the electrode 605 is disposed on the anti-reflective layer 604, and in the figure (c) the second part 605 b of the electrode 605 is disposed in the anti-reflective layer 604 and on the epitaxial layer 602. That is, in the figure (b), a part of the anti-reflective layer 604 is disposed between the first electrode 605 and the defect 602 d to cover the area substantially corresponding to the defect 602 d so an electrical isolation is formed and the first electrode 605 does not contact the defect 602 d directly. Therefore, though the defect 602 d is not removed, the yield is still improved.

According to the above method, a photovoltaic device can be made as shown in FIG. 6D. The photovoltaic device comprises an epitaxial layer 601′ in which a defect 602 d is included; a dielectric layer (the anti-reflective layer 604 in the present embodiment) on the epitaxial layer 602 to cover an area substantially corresponding to the defect 602 d; and an electrode 605 having a first part 605 a which overlaps the area above the epitaxial layer, the an electrode 605 also having a second part 605 b which does not overlap the area, and the first part 605 a of the electrode 605 is on the anti-reflective layer 604, while the second part 605 b of the electrode 605 is in the anti-reflective layer 604 and on the epitaxial layer 602.

The above-mentioned embodiments are only examples to illustrate the principle of the present invention and its effect, rather than be used to limit the present invention. Other alternatives and modifications may be made by a person of ordinary skill in the art of the present application without escaping the spirit and scope of the application, and are within the scope of the present application. 

What is claimed is:
 1. A method for yield enhancement of making a semiconductor device, comprising the steps of: providing the semiconductor device comprising an epitaxial layer including a defect; forming a dielectric layer on the epitaxial layer; detecting and identifying a location of the defect; etching the dielectric layer and leaving a part of the dielectric layer to cover an area substantially corresponding to the detected defect; forming a photo-resist on the dielectric layer in the area substantially corresponding to the detected defect before etching the dielectric layer; and forming an electrode comprising a first part and a second part, wherein the first part overlaps the area and the second part does not overlap the area, wherein detecting and identifying the location of the defect is performed by an image recognition system, and wherein the step of forming a photo-resist on the dielectric layer in an area substantially corresponding to the detected defect comprises coating the photo-resist on the dielectric layer and exposing a part of the photo-resist according to an information of the location of the defect provided by the image recognition system.
 2. The method as claimed in claim 1, wherein the dielectric layer comprises an anti-reflective layer.
 3. The method as claimed in claim 2, wherein the first part of the electrode is disposed on the anti-reflective layer, and the second part of the electrode is disposed in the anti-reflective layer and on the epitaxial layer.
 4. The method as claimed in claim 1, wherein the dielectric layer comprises silicon oxide or silicon nitride.
 5. The method as claimed in claim 1, further comprising forming an anti-reflective layer on the dielectric layer.
 6. The method as claimed in claim 5, further comprising forming an electrode comprising a first part and a second part, wherein the first part overlaps the area and the second part does not overlap the area.
 7. The method as claimed in claim 6, wherein the first part of the electrode is disposed on the anti-reflective layer, and the second part of the electrode is disposed in the anti-reflective layer and on the dielectric layer.
 8. The method as claimed in claim 5, wherein the dielectric layer comprises silicon oxide or silicon nitride.
 9. The method as claimed in claim 1, wherein exposing a part of the photo-resist is performed with a first light source different from a second light source used in the image recognition system for detecting and identifying the location of the defect.
 10. The method as claimed in claim 1, wherein the step of forming a photo-resist on the dielectric layer in an area substantially corresponding to the detected defect is performed manually.
 11. The method as claimed in claim 1, further comprising providing a mask and exposing the photo-resist with the mask to expose a pattern for an electrode on the photo-resist.
 12. A method for yield enhancement of making a semiconductor device, comprising the steps of: providing the semiconductor device comprising an epitaxial layer including a defect; forming a dielectric layer on the epitaxial layer, the dielectric layer comprising an anti-reflective layer; detecting and identifying a location of the defect; etching the dielectric layer and leaving a part of the dielectric layer to cover an area substantially corresponding to the detected defect; and forming an electrode comprising a first part and a second part, wherein the first part overlaps the area and the second part does not overlap the area, wherein the dielectric layer comprises an anti-reflective layer.
 13. The method as claimed in claim 12, wherein the first part of the electrode is disposed on the anti-reflective layer, and the second part of the electrode is disposed in the anti-reflective layer and on the epitaxial layer.
 14. The method as claimed in claim 12, wherein the dielectric layer comprises silicon oxide or silicon nitride. 